Ballast for cold cathode fluorescent lamp

ABSTRACT

A ballast includes a drive circuit, a half-bridge inverter, a transformer, and a filter. The drive circuit is configured for generating a drive signal on receiving a power. The half-bridge inverter is configured for generating a power AC signal according to the drive signal generated by the driver. The power AC signal is fed back to the drive circuit, for determining a non-overlap time of the drive signal. The transformer is configured for generating a high frequency signal based on the power AC signal. The high frequency signal is configured for lightening a lamp, and maintaining the lightening of the lamp. The filter is used for filtering out noise in the feedback power AC signal.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention generally relates to a ballast, and moreparticularly relates to a ballast for a cold cathode fluorescent lamp(CCFL).

2. Description of Related Art

Liquid crystal displays (LCDs) are used in a variety of environmentsranging from televisions to computers. Cold cathode fluorescent lamps(CCFL) are common light sources used in the LCDs, because of their highbrightness, low power consumption and low heat-generation.

Ballasts are used for controlling the CCFL during startup and operation.Typically, a ballast includes an oscillator, a drive circuit, ahalf-bridge inverter, and a resonant LC circuit. The oscillator is usedfor generating a series of pulses, and applying the pulses to the drivecircuit. The drive circuit is configured for outputting two drivesignals to the half-bridge inverter on receiving the pulses. The twodrive signals are applied to two field effect transistors (FET) in thehalf-bridge inverter, for driving the two FETs, to be turned onalternatively. The half-bridge inverter outputs a square waveaccordingly. The square wave is applied to the resonant LC circuit, thusthe resonant LC circuit sends a high-level signal, for driving the CCFLto start to work.

The output of the half-bridge inverter directly depends on anon-overlapping time of the two drive signals, further affecting thestartup of the CCFL. However, as the drive circuit outputs the drivesignals without any feedback, it is difficult to adjust thenon-overlapping time of the two drive signals, thus the non-overlappingtime of the two drive signals may not be consistent with each other.Furthermore, as there are a lot of external and internal interferencesand noise, the non-overlapping time becomes unstable, which causesdifficulty in the starting of the CCFL.

Therefore, it is an object of the present invention to provide a kind ofballast which is able to stably drive the CCFL.

SUMMARY OF THE INVENTION

A ballast includes a drive circuit, a half-bridge inverter, atransformer, and a filter. The drive circuit is configured forgenerating a drive signal on receiving a power. The half-bridge inverteris configured for generating a power AC signal according to the drivesignal generated by the driver. The power AC signal is fed back to thedrive circuit, for determining a non-overlap time of the drive signal.The transformer is configured for generating a high frequency signalbased on the power AC signal. The high frequency signal is configuredfor lightening a lamp, and maintaining the lightening of the lamp. Thefilter is used for filtering out noise in the feedback power AC signal.

A ballast includes a driver, an inverter, and a transformer. The driveris configured for outputting a high-side drive signal and low-side drivesignal. The high-side drive signal and the low-side drive signal arehigh-leveled alternatively. The inverter includes a high switchtransistor for receiving the high-side drive signal and a low switchtransistor for receiving the low-side drive signal. The high switchtransistor and the low switch transistor are serially connected, foroutputting a power AC signal. The transformer is configured foroutputting a high frequency signal based on the power AC signal, forlightening a lamp and maintaining the lightening of the lamp. The powerAC signal is also fed back to the driver, for controlling a non-overlaptime of the drive signal outputted from the driver.

Other systems, methods, features, and advantages of the present ballastwill be or become apparent to one with skill in the art upon examinationof the following drawings and detailed description. It is intended thatall such additional systems, methods, features, and advantages beincluded within this description, be within the scope of the presentsystem and method, and be protected by the accompanying claims.

BRIEF DESCRIPTION OF THE DRAWINGS

Many aspects of the present ballast can be better understood withreference to the following drawings. The components in the drawings arenot necessarily to scale, emphasis instead being placed upon clearlyillustrating the principles of the inventive system and method.Moreover, in the drawings, like reference numerals designatecorresponding parts throughout the several views.

FIG. 1 is a block diagram of a ballast in accordance with an exemplaryembodiment;

FIG. 2 is a terminal pin arrangement for a ballast driver IC;

FIG. 3 is the function of each pin of the ballast driver IC illustratedin FIG. 2;

FIG. 4 is a schematic diagram of the ballast in accordance with anexemplary embodiment;

FIG. 5 is a timing diagram of the oscillation signal CF, the drivesignals GH and GL, the power AC signal, and the feedback signal ACM;

FIG. 6 is a signal timing diagram of the lamp voltage;

FIG. 7 is a schematic diagram of a notch type filter;

FIG. 8 is an equivalent circuit of the notch type filter as shown in theFIG. 7;

FIG. 9A and FIG. 9B are characteristic diagrams of the notch type filteras shown in the FIG. 7; and

FIG. 10 is a schematic diagram of the filter in accordance with anexemplary embodiment.

DETAILED DESCRIPTION OF THE INVENTION

Reference will now be made to the drawings to describe a preferredembodiment of the inventive ballast.

Referring to FIG. 1, a block diagram of a ballast in accordance with anexemplary embodiment is illustrated. The ballast 100 includes an inputend 110, a drive circuit 120, a half-bridge inverter 130, a filter 140,and a transformer 150.

The input end 110 is configured for receiving a power for the ColdCathode Fluorescent Lamp (CCFL) 200. The input end 110 forwards thepower to the drive circuit 120.

The drive circuit 120 includes a drive controller 122, a driver 124, andan adaptive non-overlap timer 126. The drive controller 122 is used fordriving the driver 124 to output a drive signal when the power signal isreceived. The drive signal is applied to the half-bridge inverter 130.

The half-bridge inverter 130 outputs a power AC signal according to thedrive signal. The power AC signal is sent to the transformer 150 and thetransformer 150 sends a high frequency signal to the CCFL 200, thus,powering the CCFL 200.

The power AC signal is further fed back to the adaptive non-overlaptimer 126 via the filter 140. The adaptive non-overlap timer 126determines a non-overlap time of the drive signal outputted by thedriver 124 according to a slope of a feedback signal generated by thefilter 140. The adaptive non-overlap timer 126 controls the drivecontroller 124 according to the determined non-overlap time.

Referring to FIG. 2 and FIG. 3, a terminal pin arrangement for a ballastdriver IC and a function of each pin is illustrated. In the preferredembodiment, The ballast driver IC is the UBA2070 manufactured byPhilips. The ballast driver IC is used for driving fluorescent lamps,and especially for ballast circuits used in a drive circuit for coldcathode fluorescent lamps (CCFL).

Referring to FIG. 4, a schematic diagram of the ballast in accordancewith an exemplary embodiment is illustrated. The driver IC UBA2070 asshown in FIG. 2 is incorporated in the ballast 200 as the drive circuit(as the drive circuit 120 shown in FIG. 1). The ballast 400 includes adrive circuit 410, a half-bridge inverter 450, a transformer 460, and afilter 470.

The driver circuit 410 includes a high side driver 418 and a low sidedriver 420. Pin 10 and pin 6 of the driver circuit 410 are respectivelyconnected to the high side driver 418 and the low side driver 420. Thehigh side driver 418 and the low side driver 420 make up of a driver(not labeled) as the driver 124 illustrated in FIG. 1. The high sidedriver 418 and the low side driver 420 are used for outputting drivesignals to the half-bridge inverter 450. The half-bridge inverter 450includes a high switch transistor T_(hs) and a low switch transistorT_(ls). The signal GH, which is outputted by the high side driver 418 tothe pin 10 of the drive circuit 410, is applied to the high switchtransistor T_(hs). The signal GL, which is outputted by the low sidedriver 418 to the pin 6 of the drive circuit 410, is applied to the lowswitch transistor T_(ls). The half-bridge inverter 450 thus outputs thepower AC signal to the transformer 460. The transformer 460 provides ahigh frequency signal for the CCFLs that are connected in parallel withthe transformer 460 according to the power AC signal.

A work principle of the ballast 400 will be described to show a furtherdetailed structure of the ballast 400. Referring to FIG. 4, after apower supply V_(DC) is applied to the ballast 400, a charge current,which flows through a start-up resistor R_(VDD), charges a capacitorC_(VDD). Accordingly, a voltage V_(DD) on the capacitor C_(VDD) isincreased.

When the V_(DD) reaches a predetermined value, such as 13V, a voltagecontrolled oscillator 426 starts oscillation. The oscillation frequencyof the voltage controlled oscillator 426 is determined by a capacitanceof a grounded capacitor C_(CF) and a resistance of the referenceresistor R_(IREF), The voltage controlled oscillator 426 outputs anoscillation signal CF with a sawtooth waveform to the pin 3 of the drivecircuit 410.

Referring to FIG. 5, a timing diagram of the oscillation signal CF, thedrive signals GH, GL, the power AC signal, and the feedback signal ACMis illustrated. The frequency of the oscillation signal CF is twice thatof the drive signals GH, GL. The high switch transistor T_(hs) and a lowswitch transistor T_(ls) conducts in an alternating manner, thus thenon-overlap time of the AC signal is about a quarter of its period time.

After the voltage controlled oscillator 426 starts oscillating, thefrequency of the oscillation signal CF tends to decrease because aninternally fixed current charges a capacitor C_(CSW) at pin 2 of thedrive circuit 410. When the frequency of the oscillation signal CFapproaches a resonant frequency of the CCLs 500, the transformer 460outputs a high level signal that is applied to the CCFLs 500, thuscausing the CCFLs 500 to be ignited. The signal applied to the CCFLs 500(hereinafter refers to lamp voltage) is rectified by a diode D_(LVS1),and filtered by a capacitor C_(LVS2), before being detected by a lampvoltage sensor 430 of the drive circuit 410 via pin 13.

Referring to FIG. 6, a timing diagram of the lamp voltage isillustrated. When the lamp voltage becomes higher than a minimum valueMIN, an ignition timer 412 of the drive circuit 410 starts. The ignitiontimer 412 stops when the lamp voltage drops below the minimum value MIN.When the lamp voltage is between the minimum value MIN and a maximumvalue MAX, a voltage on the pin 2 of the drive circuit 410 will increaseto a clamp level, and the frequency of the oscillation signal CF willdecrease.

When the frequency of the oscillation signal CF decreases to a thresholdf_(MIN), the drive circuit enters a burn state, and the average currentsensor 428 is enabled. As soon as the average voltage over a senseresistor R_(sense) reaches a reference level at pin 15 of the drivecircuit 410, the average current sensor 428 will allow an averagecurrent through the sense resistor R_(sense) to flow to the voltagecontrolled oscillator 426. This is done to regulate the frequency of theoscillation signal CF, and to regulate a current over the CCFLs 500.

Referring also to FIG. 5, during the non-overlap time, if the feedbacksignal ACM is not beyond a range of V_(CMD) (greater than V_(CMD+) orless than V_(CMD−)), the capacitive mode detector 424 will send aninstruction, which indicating that the drive circuit 410 is incapacitive mode of operation. The frequency of the oscillation signal CFwill increase to a maximum value f_(MAX).

The high switch transistor T_(hs) and the low switch transistor T_(ls)conducts in an alternating manner, this will cause a lot of noise in theballast 400. Frequencies of the noise are often different from that ofthe power AC signal outputted from the half-bridge inverter 450. Thenoise will thus be fed back to the adaptive non-overlap timer 422 withthe feedback signal ACM. The non-overlap time tends be unstable since itis determined by the slope of the feedback signal ACM. The unstablenon-overlap time will cause the light emitted by the CCFLs 500 to havean unstable brightness, and may even cause the CCFLs 500 to be unable tobe ignited.

The filter 470 is used for filtering the noise in the feedback signalACM. The filter 470 is a notch type filter, which is used for allowingsignals with all-band to pass through except some particularfrequencies.

Referring to FIG. 7, a schematic diagram of a notch type filter isillustrated. The notch type filter 700 includes a high-pass filtercircuit 702 and a low-pass filter circuit 704. The high-pass filtercircuit 702 and the low-pass filter circuit 704 are connected inparallel with each other.

The high-pass filter circuit 702 includes a first resistor R1 with aresistance R and two first capacitors C1, each of the capacitors have acapacitance C. The first resistor R1 and the two first capacitors C1 areconnected in a “T” shape. The low-pass filter circuit 704 includes asecond capacitor C2 and two second resistors R2. The second capacitorhas a capacitance 2C, and the second resistors R2 have a uniformresistance 2R. The second capacitor C2 and the two second resistors R2are also connected in a “T” shape.

Referring to FIG. 8, an equivalent circuit of the notch type filter 700as shown in the FIG. 7 is illustrated. In the equivalent circuit, Z1,Z2, and Z3 are equivalent impedances that may be expressed by thefollowing equations:

${Z_{1} = {\frac{4{R( {1 + {2{sRC}}} )}}{1 + {4({sRC})^{2}}} = \frac{4{R( {1 + {2{j\omega}\;{RC}}} )}}{1 + {4( {{j\omega}\;{RC}} )^{2}}}}};{and}$${Z_{2} = {Z_{3} = {{\frac{1}{2}( {{2R} + \frac{1}{sC}} )} = {\frac{1}{2}( {{2R} + \frac{1}{{j\omega}\; C}} )}}}};$wherein s refers to the operator in S domain.A transfer function of the notch type filter 700 can be written in afollowing equation:

$\begin{matrix}{{F({j\omega})} = \frac{Z_{3}}{Z_{1} + Z_{3}}} \\{= \frac{1 - {4( {\omega\;{RC}} )^{2}}}{\lbrack {1 - {4( {\omega\;{RC}} )^{2}}} \rbrack + {8{j\omega}\;{RC}}}} \\{{= \frac{1 - ( {\omega/\omega_{0}} )^{2}}{\lbrack {1 - ( {\omega/\omega_{0}} )^{2} + {4j\;{\omega/\omega_{0}}}} \rbrack}},}\end{matrix}$wherein j refers to the operator in frequency domain ω stands for anangular frequency, and ω₀ stands for a characteristic angular frequencyof the notch type filter 700. ω₀ is expressed by

$\omega_{0} = {\frac{1}{2{RC}}.}$

An amplitude-frequency characteristic and a phase-frequencycharacteristic of the notch type filter 700 can be concluded by thetransfer function:

${{{F({j\omega})}} = \frac{{1 - ( {\omega/\omega_{0}} )^{2}}}{\sqrt{\lbrack {1 - ( {\omega/\omega_{0}} )^{2}} \rbrack^{2} + \lbrack {4( {\omega/\omega_{0}} )} \rbrack^{2}}}};{and}$$\varphi = \{ {\begin{matrix}{{- {arc}}\;{tg}\frac{4( {\omega/\omega_{0}} )}{1 - ( {\omega/\omega_{0}} )^{2}}} & {{{when}\mspace{14mu}{\omega/\omega_{0}}} < 1} \\{\pi - {{arc}\;{tg}\frac{4( {\omega/\omega_{0}} )}{1 - ( {\omega/\omega_{0}} )^{2}}}} & {{{when}\mspace{14mu}{\omega/\omega_{0}}} > 1}\end{matrix}.} $

Referring to FIGS. 9A and 9B, characteristic diagrams of the notch typefilter 700 as shown in the FIG. 7 are illustrated. FIG. 9A illustratesthe characteristic diagram of the amplitude-frequency characteristic.When the angular frequency of an input signal is equal to thecharacteristic angular frequency of the notch type filter 700, theamplitude of an output signal is about zero. FIG. 9B illustrates thecharacteristic diagram of the phase-frequency characteristic. As theangular frequency of the input signal approaches infinitely large orinfinitely small, the phase shifted in the output signal decreases.

Referring to FIG. 10, a schematic diagram of the filter in accordancewith an exemplary embodiment is illustrated. The filter 1000 includes anotch type filter 1002, an amplifier 1004, and two voltage-divideresistors 1006, 1008. The notch type filter 1002 has a similar structureto that of the notch type filter 700 as shown in FIG. 7. The amplifier1004 has an inverting input and a non-inverting input. The outputtedsignal of the notch type filter 1002 is applied to the non-invertinginput of the amplifier 1004. The amplifier 1004 outputs an amplifiedsignal after amplifying the outputted signal of the notch type filter1002. The amplified signal is fed back to the inverting input of theamplifier 1004 after divided by the two voltage-divide resistors 1006and 1008.

The transfer function of the filter 1000 can be represented by theequation:

$\begin{matrix}{{A(s)} = \frac{V_{o}(s)}{V_{i}(s)}} \\{{= \frac{{A_{VF}\lbrack {1 + {s/\omega_{0}}} \rbrack}^{2}}{1 + {2( {2 - A_{VF}} ){s/\omega_{0}}} + ( {s/\omega_{0}} )^{2}}},{or}}\end{matrix}$ $\begin{matrix}{{A({j\omega})} = \frac{V_{o}(s)}{V_{i}(s)}} \\{= \frac{A_{VF}\lbrack {1 + ( {{j\omega}/\omega_{0}} )^{2}} \rbrack}{1 + {2( {2 - A_{VF}} ){{j\omega}/\omega_{0}}} + ( {{j\omega}/\omega_{0}} )^{2}}} \\{{= \frac{A_{VF}\lbrack {1 + ( {{j\omega}/\omega_{0}} )^{2}} \rbrack}{1 + {\frac{1}{Q} \cdot {{j\omega}/\omega_{0}}} + ( {{j\omega}/\omega_{0}} )^{2}}};}\end{matrix}$wherein A_(VF) refers to an amplification of the amplifier 1004, and Qrefers to a Quality factor (Q factor) of the filter 1000. Theamplification A_(VF) can be expressed by an equation

${A_{VF} = {1 + \frac{R_{b}}{R_{a}}}},$wherein R_(a) and R_(b) respectively stand for the resistances of thetwo voltage-divide resistors 1006 and 1008. The quality factor Q can beexpressed by an equation

$Q = {\frac{1}{2( {2 - A_{VF}} )}.}$As the amplification A_(VF) of the amplifier 1004 approaches 2, thequality factor tends to become infinitely large. The filter 1000 mayadjust a frequency pass band by adjusting the amplification A_(VF) ofthe amplifier 1004. The adjustment of the amplification A_(VF) of theamplifier 1004 may be accomplished by choosing different voltage-divideresistors 1006 and 1008.

By incorporating the filter 1000, the ballast is able to filter outnoise in the feedback signal ACM, thus the non-overlap time which isdetermined according to the feedback signal ACM is stable. Further, thebrightness of the CCFLs may be stablized, and ignition failures may beavoided.

1. A ballast comprising: a drive circuit comprising an adaptivenon-overlap timer, a driver, and a drive controller, the driver beingconfigured for generating a drive signal on receiving a power signal; ahalf-bridge inverter for generating a power AC signal according to thedrive signal generated by the driver, the power AC signal being fed backto the drive circuit, the power AC signal being used for determining anon-overlap time of the drive signal; a transformer for generating ahigh frequency signal based on the power AC signal, the high frequencysignal being configured for lightening a lamp, and maintaining thelightening of the lamp; and a filter for filtering out noise in thefeedback power AC signal; wherein the adaptive non-overlap timer isconfigured for determining a non-overlap time according to the filteredfeedback power AC signal, and the drive controller is used forcontrolling the non-overlap time of the drive signal according to thedetermined non-overlap time.
 2. The ballast as claimed in claim 1,wherein the adaptive non-overlap timer determines the non-overlap timeof the drive signal according to a slope of the filtered feedback powerAC signal.
 3. The ballast as claimed in claim 1, wherein the filter is anotch type filter.
 4. The ballast as claimed in claim 3, wherein thenotch type filter comprises a high-pass filter circuit for filtering outnoise with low frequencies and a low-pass filter circuit for filteringout noise with high frequencies.
 5. The ballast as claimed in claim 4,wherein the high-pass filter circuit and the low-pass filter circuit areconnected in parallel with each other.
 6. The ballast as claimed inclaim 4, wherein the high-pass filter comprises a first resistor and twofirst capacitors; the two first capacitors are connected in series; oneend of the first resistor is connected between the two first capacitors.7. The ballast as claimed in claim 4, wherein the low-pass filtercomprises a second capacitor and two second resistors; the two secondresistors are connected in series; one end of the second capacitor isconnected between the two second resistors.
 8. The ballast as claimed inclaim 1, wherein the filter comprises a notch type filter and anamplifier, the notch type filter is used for filtering out noise in thefeedback power AC signal, and the amplifier is used for amplifying anoutputted signal of the notch type filter.
 9. The ballast as claimed inclaim 8, wherein the amplifier comprises an inverting input and anon-inverting input, the outputted signal of the notch type filter isapplied to the non-inverting input of the amplifier, and an amplifiedsignal outputted from the amplifier is fed back to the inverting input.10. The ballast as claimed in claim 9, wherein the filter furthercomprises two voltage-divide resistors that are serially connected to anoutput of the amplifier; the inverting input of the amplifier isconnected between the two voltage-divide resistors.
 11. The ballast asclaimed in claim 10, wherein the amplified signal is coupled to groundvia the two voltage-divide resistors.
 12. A ballast comprising: a driverfor outputting a high-side drive signal and a low-side drive signal, thehigh-side drive signal and the low-side drive signal are high-leveledalternatively; an inverter comprising a high switch transistor forreceiving the high-side drive signal and a low switch transistor forreceiving the low-side drive signal, the high switch transistor and thelow switch transistor are serially connected for outputting a power ACsignal, the power AC signal being fed back to the driver; an adaptivenon-overlap timer for receiving the feedback power AC signal, anddetermining a non-overlap time of the high-side drive signal and thelow-side drive signal according to the feedback power AC signal; and atransformer for outputting a high frequency signal based on the power ACsignal, the power AC signal being used for lighting a lamp andmaintaining the lightening of the lamp.
 13. The ballast as claimed inclaim 12, wherein the ballast further comprises a filter connectedbetween the inverter and the adaptive non-overlap timer, the filter isused for filtering out noise in the feedback power AC signal.
 14. Theballast as claimed in claim 13, wherein the filter is a notch typefilter.
 15. The ballast as claimed in claim 13, wherein the filter is atwin T notch type filter that comprises a T type high-pass filtercircuit and a T type low-pass filter circuit that are connected inparallel with each other.
 16. The ballast as claimed in claim 15,wherein the high-pass filter comprises a first resistor and two firstcapacitors; the two first capacitors are connected in series; one end ofthe first resistor is connected between the two first capacitors; thelow-pass filter comprises a second capacitor and two second resistors;the two second resistors are connected in series; one end of the secondcapacitor is connected between the two second resistors.
 17. The ballastas claimed in claim 13, wherein the filter comprises a notch type filterfor filtering out noise in the feedback power AC signal and an amplifierfor amplifying an outputted signal of the notch type filter.
 18. Theballast as claimed in claim 17, wherein the filter further comprises twovoltage-divide resistors that are serially connected to an output of theamplifier; an inverting input of the amplifier is connected between thetwo voltage-divide resistors, and a non-inverting input of the amplifieris connected to an output of the notch type filter.